deploy: 55f6a74e1e

2026-07-30 18:41:42 +00:00 · 2026-06-02 15:46:25 +00:00
parent e3c245b45b
commit 62f74a1ea3
340 changed files with 119915 additions and 0 deletions
@@ -0,0 +1,78 @@
+é chip revision: v0.2
+
+I (34) boot.esp32s3: Boot SPI Speed : 80MHz
+
+I (38) boot.esp32s3: SPI Mode       : DIO
+
+I (43) boot.esp32s3: SPI Flash Size : 8MB
+
+I (48) boot: Enabling RNG early entropy source...
+
+I (53) boot: Partition Table:
+
+I (57) boot: ## Label            Usage          Type ST Offset   Length
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+I (64) boot:  0 nvs              WiFi data        01 02 00009000 00006000
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+I (71) boot:  1 phy_init         RF data          01 01 0000f000 00001000
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+I (79) boot:  2 factory          factory app      00 00 00010000 00100000
+
+I (86) boot: End of partition table
+
+I (91) esp_image: segment 0: paddr=00010020 vaddr=3c0b0020 size=2e5ach (189868) map
+
+I (133) esp_image: segment 1: paddr=0003e5d4 vaddr=3fc97e00 size=01a44h (  6724) load
+
+I (135) esp_image: segment 2: paddr=00040020 vaddr=42000020 size=a0acch (658124) map
+
+I (257) esp_image: segment 3: paddr=000e0af4 vaddr=3fc99844 size=02bbch ( 11196) load
+
+I (260) esp_image: segment 4: paddr=000e36b8 vaddr=40374000 size=13d5ch ( 81244) load
+
+I (289) boot: Loaded app from partition at offset 0x10000
+
+I (289) boot: Disabling RNG early entropy source...
+
+I (300) cpu_start: Multicore app
+
+I (310) cpu_start: Pro cpu start user code
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+I (310) cpu_start: cpu freq: 160000000 Hz
+
+I (310) cpu_start: Application information:
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+I (313) cpu_start: Project name:     esp32-csi-node
+
+I (319) cpu_start: App version:      1
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+I (323) cpu_start: Compile time:     Mar  3 2026 04:15:10
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+I (329) cpu_start: ELF file SHA256:  50c89a9ed...
+
+I (334) cpu_start: ESP-IDF:          v5.2
+
+I (339) cpu_start: Min chip rev:     v0.0
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+I (344) cpu_start: Max chip rev:     v0.99 
+
+I (349) cpu_start: Chip rev:         v0.2
+
+I (353) heap_init: Initializing. RAM available for dynamic allocation:
+
+I (361) heap_init: At 3FCA9468 len 000402A8 (256 KiB): RAM
+
+I (367) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
+
+I (373) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
+
+I (379) heap_init: At 600FE010 len 00001FD8 (7 KiB): RTCRAM
+
+I (386) spi_flash: detected chip: gd
+
+I (390) spi_flash: flash io: dio
+
+I (394) sleep: Configure to isolate all GPIO pins in sleep state
+
+I (400) sleep: Enable automatic switching of GPIO sleep configuration
+