ruv edbe57378a fix(signal/cir): un-ignore end-to-end CIR pipeline test — ADR-134 P2 fully resolved ...

The cir_pipeline end-to-end test was gated on the same dominant_tap_ratio
floor; the windowed-ratio fix resolves it. All 6 ADR-134 P2 CIR tests
(cir_synthetic 5 + cir_pipeline 1) now pass. signal+cir: 472 pass / 0 fail.

Co-Authored-By: claude-flow <ruv@ruv.net>

2026-05-31 06:27:50 -04:00

..

data

feat(signal): ADR-134 CSI→CIR via ISTA + NeumannSolver warm-start (#837)

2026-05-28 16:24:37 -04:00

calibration_drift.rs

feat(signal): ADR-135 — empty-room baseline calibration

2026-05-28 18:57:08 -04:00

calibration_roundtrip.rs

feat(signal): ADR-135 — empty-room baseline calibration

2026-05-28 18:57:08 -04:00

calibration_synthetic.rs

feat(signal): ADR-135 — empty-room baseline calibration

2026-05-28 18:57:08 -04:00

cir_ghost_taps.rs

feat(signal): ADR-134 CSI→CIR via ISTA + NeumannSolver warm-start (#837)

2026-05-28 16:24:37 -04:00

cir_pipeline.rs

fix(signal/cir): un-ignore end-to-end CIR pipeline test — ADR-134 P2 fully resolved

2026-05-31 06:27:50 -04:00

cir_synthetic.rs

fix(signal/cir): causal-delay-window rms spread — resolves last ADR-134 P2 cir test

2026-05-31 06:26:48 -04:00

validation_test.rs

fix(security): audit — fix RUSTSEC vulns, clippy warnings, dead code (#769)

2026-05-23 05:36:13 -04:00