ruv e9bb4faf53 feat: ADR-039 edge intelligence — on-device CSI processing pipeline ...

Implements a dual-core edge processing system for ESP32-S3:
- Lock-free SPSC ring buffer (Core 0 produces, Core 1 consumes)
- Tier 1: phase unwrap, Welford stats, top-K subcarrier selection, delta compression
- Tier 2: presence/motion detection, vital signs (breathing/heart rate via biquad IIR), fall detection
- Vitals UDP packet (magic 0xC5110002, 32 bytes, sent at 1 Hz)
- NVS/Kconfig configurable (edge_tier, thresholds, intervals)
- Backward compatible: tier=0 (default) is a no-op
- GitHub Actions firmware CI: build, binary size gate, credential scan, flash image verification
- Binary: 777 KB (24% free in 1 MB partition)

Co-Authored-By: claude-flow <ruv@ruv.net>

2026-03-02 19:55:35 -05:00

..

cd.yml

security: Fix GitHub Actions shell injection vulnerability

2026-02-28 20:40:25 +01:00

ci.yml

feat: ADR-024 Contrastive CSI Embedding Model — all 7 phases (#52)

2026-03-01 01:44:38 -05:00

firmware-ci.yml

feat: ADR-039 edge intelligence — on-device CSI processing pipeline

2026-03-02 19:55:35 -05:00

security-scan.yml

feat: ADR-024 Contrastive CSI Embedding Model — all 7 phases (#52)

2026-03-01 01:44:38 -05:00

verify-pipeline.yml

feat: CI pipeline verification, 3D body model, auth fixes, requirements lock

2026-02-28 06:20:08 +00:00