mirror of
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1c2b383075
Adopt "WiFi Veil" as the product name across all user-facing surfaces, keeping VEIL (Verifiable Emission-shaping for Identity-Leakage prevention) as the technical codename it's built on. Only prose, titles, descriptions, and the console UI change — no code identifiers, file names, crate/npm `name` fields, or the deterministic proof witness are touched, so `cargo test` and the C-core host test are unaffected. - Crate & research READMEs: title + defining line now "WiFi Veil (codename VEIL — …)". - Cargo.toml / package.json / plugin.json descriptions: "WiFi Veil …". - Console UI (veil-console.html): title, brand, and copy say "WiFi Veil". - Firmware tree (README, per-provider READMEs, BUILD/INTEGRATION/MEASUREMENT): "WiFi Veil protector/core/shield". - Harness manifest: recomputed SHA-256 digests for the four changed packaged files (README, package.json, CLAUDE.md, plugin.json) — all verified consistent. Co-Authored-By: claude-flow <ruv@ruv.net> Claude-Session: https://claude.ai/code/session_01WEXNqzs7UsfNFBcP5yW21p
123 lines
6.8 KiB
Markdown
123 lines
6.8 KiB
Markdown
# WiFi Veil protector — openwifi (Xilinx Zynq + AD9361, open PHY/MAC)
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> **STATUS: SYNTHETIC / L0 — build-only scaffold. No hardware, no flash, no
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> capture. Nothing here has run on silicon.** Per CLAUDE.md, none of this is a
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> `MEASURED` result and none may be claimed as working. Files are honest
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> skeletons with real openwifi idioms plus `TODO(hw)` / `TODO(hdl)` markers, not
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> validated firmware or complete HDL. **Compliant waveform controls only — the
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> keyed rotation is orthogonal (energy-preserving) and shapes only this node's
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> own standards-conformant emission. Never jamming.**
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## Feasibility grade: **B (capability ceiling A; effort D)**
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openwifi is the **only** platform in this tree where a true end-to-end keyed
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rotation *and its inverse* are physically reachable, because it is the only one
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that exposes the full open PHY/MAC on FPGA: `openofdm_tx`/`openofdm_rx`,
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`tx_intf`/`rx_intf`, and `side_ch`, all AXI-Lite-programmable from a Linux
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driver ([FPGA module design][fmd], [openwifi overview][ov]). That is the **A**
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capability ceiling.
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It is graded **B**, not A, for two honest reasons that make it the
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highest-*effort* path:
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1. **openwifi has no native explicit transmit beamforming.** It ships as an
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802.11a/g/n **single-spatial-stream (SISO)** design. It does not run NDP
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sounding, does not compute an SVD `V` matrix, and does not emit a compressed
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beamforming report. The two-antenna app note is **RX-only** coherent capture
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(`side_ch_ctl wh3h11`), not a MIMO transmit spatial mapper ([iq_2ant][2ant]).
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So there is no shipped compressed-BF-report to obfuscate and no shipped
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spatial-mapping matrix `Q` to left-multiply — both must be **added in HDL**.
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2. Reaching a true two-stream demo needs a **second TX chain** (the AD9361 on
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fmcomms2/3 has two DACs) plus a new spatial-mapping RTL stage and a Vivado
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rebuild — days-to-weeks of FPGA work, not a driver patch.
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Because of (1), on openwifi WiFi Veil is realized as the **client-transparent
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per-packet keyed unitary** (LeakyBeam family) applied at the TX spatial-mapping
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stage, with the legitimate STA (a second openwifi node sharing the key)
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inverting it — **not** as obfuscation of a compressed-BF report the hardware
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never produces. This keeps the claim honest: we rotate the *transmitted spatial
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mapping* so a sniffer's per-subcarrier channel estimate `H·Q(key)` is scrambled,
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and the keyed receiver applies `Q(key)^H` before channel estimation.
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## Exact insertion points
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The rotation is a keyed orthogonal (unitary) matrix `Q(key, session)` computed
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by the portable core (`../core/veil_shield.{h,c}`), the same SplitMix64 schedule
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used everywhere, so both ends derive the identical `Q` from the shared key.
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**TX (protector) — FPGA, new block `veil_rot`:**
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Insert on the baseband IQ AXI-Stream path **between `openofdm_tx` (post-IFFT,
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post-CP) and `tx_intf`** (which feeds the AD9361 DAC). `veil_rot` left-multiplies
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the per-subcarrier / per-stream sample vector by `Q(key)`. Its coefficients (or a
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key seed + on-FPGA schedule) are written over **AXI-Lite** from the driver shim
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using the standard openwifi `iowrite32(value, base_addr + reg)` idiom
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([tx_intf driver][txintf]). See `HDL_NOTES.md`.
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**RX (legitimate STA) — FPGA, new block `veil_unrot`:**
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Insert **between `rx_intf` (AD9361 ADC) and `openofdm_rx`**, or in the frequency
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domain immediately after the FFT and **before channel estimation**, applying
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`Q(key)^H`. Same AXI-Lite programming path.
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**Driver / control plane:** the C shim `veil_openwifi.c` computes the session
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key schedule via the core and programs the blocks. Real openwifi control idioms:
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AXI-Lite MMIO from the kernel driver, and the `sdrctl` nl80211-testmode tool /
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`side_ch_ctl` register pokes for bring-up ([sdrctl/side_ch][ov], [frequent
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tricks][ft]). Where the exact offsets/bitfields are not yet fixed, the shim
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marks `TODO(hw)`; RTL specifics are `TODO(hdl)`.
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Doing the rotation in HDL (not the DMA'd payload) is deliberate: it keeps the
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frame **standards-conformant on the wire** and preserves transmit energy — the
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"not jamming" invariant the core guarantees by construction (orthogonal `Q`).
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## Two-node measurement plan (the P5 path)
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Three roles produce the first `MEASURED` / P5 result (full protocol +
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required witness log in `MEASUREMENT.md`):
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- **Protector AP** — openwifi node A, `veil_rot` engaged, TX spatial mapping
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keyed with the session key.
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- **Legitimate STA** — openwifi node B, shares the key, `veil_unrot` engaged;
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should see **near-baseline throughput** (rotation cancels).
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- **Attacker sniffer** — a commodity Wi-Fi NIC running **Wi-BFI** / monitor
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capture, extracting the per-subcarrier CSI / beamforming feedback and running
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the re-ID model ([Wi-BFI][wibfi]).
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Headline metric: **re-identification accuracy off vs. on** at the attacker
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(target: collapse toward chance) **while** iperf throughput A↔B stays near
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baseline and per-frame energy is unchanged. No number here is real until a
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captured on-silicon log exists.
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## Bill of materials (target, not procured)
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- 2× Xilinx Zynq-7000 board with AD9361 FMC (e.g. ZC706 + fmcomms2/3, or
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ADRV9361-Z7035 / Antenna-SDR), openwifi image per the openwifi build docs.
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- 1× attacker host + Wi-BFI-capable NIC (per Wi-BFI's supported list).
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- Vivado for the FPGA rebuild that adds `veil_rot` / `veil_unrot`.
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## Files here
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| File | What it is |
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| `README.md` | this — feasibility, insertion points, measurement plan |
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| `veil_openwifi.c` | driver-side C shim: core → session `Q` → AXI-Lite program (scaffold, `TODO(hw)`) |
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| `HDL_NOTES.md` | the `veil_rot` / `veil_unrot` Verilog blocks (design notes, `TODO(hdl)`) |
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| `MEASUREMENT.md` | exact P5 protocol, metrics, and the required witness artifact |
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## Sources
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- FPGA module design — [deepwiki.com/open-sdr/openwifi/2.2-fpga-module-design][fmd]
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- openwifi overview (sdrctl, side_ch, nl80211 testmode) — [deepwiki.com/open-sdr/openwifi/1-openwifi-overview][ov]
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- Two-antenna IQ (RX-only) app note — [github.com/open-sdr/openwifi .../iq_2ant.md][2ant]
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- tx_intf driver register idioms (`iowrite32`/`ioread32`) — [github.com/open-sdr/openwifi .../tx_intf.c][txintf]
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- Frequent tricks / register pokes — [github.com/open-sdr/openwifi .../frequent_trick.md][ft]
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- openwifi paper (SDR 802.11 on SoC) — [researchgate .../342582824][paper]
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- Wi-BFI (attacker BF-feedback extraction) — [arxiv.org/pdf/2309.04408][wibfi]
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[fmd]: https://deepwiki.com/open-sdr/openwifi/2.2-fpga-module-design
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[ov]: https://deepwiki.com/open-sdr/openwifi/1-openwifi-overview
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[2ant]: https://github.com/open-sdr/openwifi/blob/master/doc/app_notes/iq_2ant.md
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[txintf]: https://github.com/open-sdr/openwifi/blob/master/driver/tx_intf/tx_intf.c
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[ft]: https://github.com/open-sdr/openwifi/blob/master/doc/app_notes/frequent_trick.md
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[paper]: https://www.researchgate.net/publication/342582824_openwifi_a_free_and_open-source_IEEE80211_SDR_implementation_on_SoC
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[wibfi]: https://arxiv.org/pdf/2309.04408
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